RISC-V (DIR-V) Program


The Union Minister inaugurated the Nationwide Roadshow on the Digital India RISC-V (DIR-V) Program.

Main Details:

  • The DIR-V program is designed to enhance India’s semiconductor ecosystem.
  • Its primary objective is to encourage indigenous innovation in the realm of microprocessors.
  • The program is grounded in three fundamental principles: innovation, functionality, and performance.
  • India’s computing systems are poised to benefit significantly from the DIR-V (Digital India RISC V) program, establishing a robust presence in critical areas such as automotive, space technology, IoT sensors, and mobility.
  • RISC-V represents an open-source computer model, denoting an instruction set architecture developed by the University of California, Berkeley.
  • The acronym RISC-V stands for ‘Reduced Instruction Set Computer,’ with ‘V’ signifying the fifth generation.
  • The overarching goal is to position India as a RISC-V Talent Hub globally and a supplier of RISC-V System on Chips catering to servers, mobile devices, automotive, IoT, and microcontrollers worldwide.